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SET1 (SPC700): Difference between revisions
From SnesLab
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|02 | |02 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|22 | |22 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|42 | |42 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|62 | |62 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|82 | |82 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|A2 | |A2 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|C2 | |C2 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Bit Addressing | Direct Page Bit]] | ||
|E2 | |E2 | ||
|2 bytes | |2 bytes | ||
| Line 51: | Line 51: | ||
!colspan="8"|Flags Affected | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|P | |[[Direct Page Flag|P]] | ||
|B | |[[Break Flag|B]] | ||
|H | |[[Half-Carry Flag|H]] | ||
|I | |[[Interrupt Enable Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
|. | |. | ||
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|} | |} | ||
'''SET1''' is an [[SPC700]] command that sets a bit in a [[direct page]] byte. The byte following the opcode determines which byte. The | '''SET1''' is an [[SPC700]] command that sets a bit in a [[direct page]] byte. The byte following the opcode determines which byte. The most significant 3 bits of the opcode determines which bit within that byte. | ||
=== See Also === | === See Also === | ||
* [[CLR1]] | * [[CLR1]] | ||
* [[TSET1]] | * [[TSET1]] | ||
* [[SMB]] | |||
=== External Links === | === External Links === | ||
* Official Nintendo documentation on SET1: [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I] | * Official Nintendo documentation on SET1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I] | ||
* subparagraph 8.2.3.1 of [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8], lbid. | |||
* http://www.ffviman.fr/switch-snes/sf-sound.html | * http://www.ffviman.fr/switch-snes/sf-sound.html | ||
| Line 83: | Line 85: | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:Bit Operation Commands]] | [[Category:Bit Operation Commands]] | ||
[[Category:Read-Modify-Write Instructions]] | |||
[[Category:Two-byte Instructions]] | |||
Latest revision as of 13:22, 29 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Direct Page Bit | 02 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | 22 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | 42 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | 62 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | 82 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | A2 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | C2 | 2 bytes | 4 cycles | ||||
| Direct Page Bit | E2 | 2 bytes | 4 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | . |
SET1 is an SPC700 command that sets a bit in a direct page byte. The byte following the opcode determines which byte. The most significant 3 bits of the opcode determines which bit within that byte.
See Also
External Links
- Official Nintendo documentation on SET1: Table C-18 in Appendix C-9 of Book I
- subparagraph 8.2.3.1 of page 3-8-8, lbid.
- http://www.ffviman.fr/switch-snes/sf-sound.html