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SET1 (SPC700): Difference between revisions
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SET1 is an [[SPC700]] command that sets the | {| class="wikitable" style="float:right;clear:right;width:40%" | ||
!colspan="8"|Basic Info | |||
|+ | |||
|'''Addressing Mode''' | |||
|'''Opcode''' | |||
|'''Length''' | |||
|'''Speed''' | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|02 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|22 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|42 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|62 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|82 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|A2 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|C2 | |||
|2 bytes | |||
|4 cycles | |||
|+ | |||
|[[Direct Page Bit Addressing | Direct Page Bit]] | |||
|E2 | |||
|2 bytes | |||
|4 cycles | |||
|} | |||
{| class="wikitable" style="float:right;clear:right;width:30%" | |||
!colspan="8"|Flags Affected | |||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[Direct Page Flag|P]] | |||
|[[Break Flag|B]] | |||
|[[Half-Carry Flag|H]] | |||
|[[Interrupt Enable Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |||
|. | |||
|. | |||
|. | |||
|. | |||
|. | |||
|. | |||
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|} | |||
'''SET1''' is an [[SPC700]] command that sets a bit in a [[direct page]] byte. The byte following the opcode determines which byte. The most significant 3 bits of the opcode determines which bit within that byte. In Nintendo's manual, the high nybble of the opcode is called x and bit 4 of the opcode is always zero. | |||
No flags are affected. | |||
==== Syntax ==== | |||
<pre> | |||
SET1 dip. bit | |||
</pre> | |||
=== See Also === | |||
* [[CLR1]] | |||
* [[TSET1]] | |||
* [[SMB]] | |||
* [[dip bit]] | |||
=== External Links === | |||
* Official Nintendo documentation on SET1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I] | |||
* subparagraph 8.2.3.1 of [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8], lbid. | |||
* [https://archive.org/details/SNESDevManual/book1/page/n226 Appendix C-1] | |||
* http://www.ffviman.fr/switch-snes/sf-sound.html | |||
* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L572 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:Bit Operation Commands]] | [[Category:Bit Operation Commands]] | ||
[[Category:Read-Modify-Write Instructions]] | |||
[[Category:Two-byte Instructions]] |
Latest revision as of 04:25, 8 August 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Direct Page Bit | 02 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 22 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 42 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 62 | 2 bytes | 4 cycles | ||||
Direct Page Bit | 82 | 2 bytes | 4 cycles | ||||
Direct Page Bit | A2 | 2 bytes | 4 cycles | ||||
Direct Page Bit | C2 | 2 bytes | 4 cycles | ||||
Direct Page Bit | E2 | 2 bytes | 4 cycles |
Flags Affected | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . | . | . | . |
SET1 is an SPC700 command that sets a bit in a direct page byte. The byte following the opcode determines which byte. The most significant 3 bits of the opcode determines which bit within that byte. In Nintendo's manual, the high nybble of the opcode is called x and bit 4 of the opcode is always zero.
No flags are affected.
Syntax
SET1 dip. bit
See Also
External Links
- Official Nintendo documentation on SET1: Table C-18 in Appendix C-9 of Book I
- subparagraph 8.2.3.1 of page 3-8-8, lbid.
- Appendix C-1
- http://www.ffviman.fr/switch-snes/sf-sound.html
- anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L572