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Index Register Select: Difference between revisions
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'''Index Register Select''' (X) is a flag in the [[processor status register]] (bit 4) of the [[65c816]]. It indicates how wide the [[index register]]s are: | '''Index Register Select''' (X) is a flag in the [[processor status register]] (bit 4) of the [[65c816]]. It indicates how wide the [[index register]]s are: | ||
* When clear, both index registers are 16 bits wide. | * When clear, both index registers are 16 bits wide. It can only be clear in [[native mode]]. | ||
* When set, both index registers are 8 bits wide. | * When set, both index registers are 8 bits wide. | ||
Revision as of 21:32, 9 August 2024
Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:
- When clear, both index registers are 16 bits wide. It can only be clear in native mode.
- When set, both index registers are 8 bits wide.
It is not possible to control the width of the two index registers individually.
It can be affected by:
It affects the behavior of (incomplete list):
In emulation mode, the x flag becomes the break flag.
There are no BXS or BXC instructions that examine this flag.
See Also
Reference
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.