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Absolute Addressing: Difference between revisions

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(→‎Reference: section 3.5.1 of 65c816 datasheet)
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* [[Absolute Long Addressing]]
* [[Absolute Long Addressing]]


=== Reference ===
=== References ===
* [[Eyes & Lichty]] page 379: https://archive.org/details/0893037893ProgrammingThe65816/page/n405
* [[Eyes & Lichty]] page 379: https://archive.org/details/0893037893ProgrammingThe65816/page/n405
* lbid, page 111: https://archive.org/details/0893037893ProgrammingThe65816/page/n137
* lbid, page 111: https://archive.org/details/0893037893ProgrammingThe65816/page/n137
* section 3.5.1 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf


[[Category:ASM]]
[[Category:ASM]]
[[Category:Addressing Modes]]
[[Category:Addressing Modes]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Revision as of 17:49, 27 June 2024

Twenty six instructions support absolute addressing.

  • ADC (opcode 6D)
  • AND (opcode 2D)
  • ASL (opcode 0E)
  • BIT (opcode 2C)
  • CMP (opcode CD)
  • CPX (opcode EC)
  • CPY (opcode CC)
  • DEC (opcode CE)
  • EOR (opcode 4D)
  • INC (opcode EE)
  • LDA (opcode AD)
  • LDX (opcode AE)
  • LDY (opcode AC)
  • LSR (opcode 4E)
  • ORA (opcode 0D)
  • ROL (opcode 2E)
  • ROR (opcode 6E)
  • SBC (opcode ED)
  • STA (opcode 8D)
  • STX (opcode 8E)
  • STY (opcode 8C)
  • STZ (opcode 9C)
  • TRB (opcode 1C)
  • TSB (opcode 0C)
  • JMP (opcode 4C)
  • JSR (opcode 20)

See Also

References