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Index Register Select: Difference between revisions
From SnesLab
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(started list of affected instructions) |
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* [[PLP]] | * [[PLP]] | ||
* [[RTI]] | * [[RTI]] | ||
It affects the behavior of (incomplete list): | |||
* [[LDX]] | |||
* [[LDY]] | |||
* [[STX]] | |||
* [[STY]] | |||
* [[TXY]] | |||
* [[TYX]] | |||
In [[emulation mode]], the x flag becomes the [[break flag]]. | In [[emulation mode]], the x flag becomes the [[break flag]]. |
Revision as of 21:28, 9 August 2024
Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:
- When clear, both index registers are 16 bits wide.
- When set, both index registers are 8 bits wide.
It is not possible to control the width of the two index registers individually.
It can be affected by:
It affects the behavior of (incomplete list):
In emulation mode, the x flag becomes the break flag.
There are no BXS or BXC instructions that examine this flag.
See Also
Reference
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.