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X Index Register: Difference between revisions
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The '''X Index Register''' exists on 65x processors and often holds the current index when iterating over things. | The '''X Index Register''' exists on 65x processors and often holds the current index when iterating over things. | ||
On the [[S-SMP]] it is always 8 bits wide. On the [[65c816]], it may be 8 or 16 bits wide. | On the [[S-SMP]] it is always 8 bits wide. It is the divisor for division commands.<sup>[2]</sup> | ||
On the [[65c816]], it may be 8 or 16 bits wide. Indexing may cross bank boundaries.<sup>[1]</sup> | |||
Unlike the [[Y index register]], the value of the [[stack pointer]] can be transferred to/from X. See [[TXS]] and [[TSX]]. | Unlike the [[Y index register]], the value of the [[stack pointer]] can be transferred to/from X. See [[TXS]] and [[TSX]]. | ||
=== See Also === | === See Also === | ||
* [[INX]] | |||
* [[DEX]] | |||
* [[LDX]] | * [[LDX]] | ||
* [[STX]] | * [[STX]] | ||
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* [[PLX]] | * [[PLX]] | ||
* [[Accumulator]] | * [[Accumulator]] | ||
=== Reference === | |||
# https://wilsonminesco.com/816myths | |||
# 8.1.2 of [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
Latest revision as of 06:29, 20 December 2023
The X Index Register exists on 65x processors and often holds the current index when iterating over things.
On the S-SMP it is always 8 bits wide. It is the divisor for division commands.[2]
On the 65c816, it may be 8 or 16 bits wide. Indexing may cross bank boundaries.[1]
Unlike the Y index register, the value of the stack pointer can be transferred to/from X. See TXS and TSX.
See Also
Reference
- https://wilsonminesco.com/816myths
- 8.1.2 of page 3-8-4 of Book I of the official Super Nintendo development manual