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Index Register Select: Difference between revisions
From SnesLab
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* [[REP]] ( | * [[REP]] (clears it if bit 4 of operand is set) | ||
* [[SEP]] ( | * [[SEP]] (sets it if bit 4 of operand is set) | ||
* [[PLP]] | * [[PLP]] (pops it off the [[stack]]) | ||
* [[RTI]] | * [[RTI]] | ||
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* [[CPX]] | * [[CPX]] | ||
* [[CPY]] | * [[CPY]] | ||
* [[PHX]] | |||
* [[PHY]] | |||
* [[PLX]] | |||
* [[PLY]] | |||
* [[INX]] | * [[INX]] | ||
* [[INY]] | * [[INY]] |
Latest revision as of 21:38, 16 August 2024
Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:
- When clear, both index registers are 16 bits wide. It can only be clear in native mode.
- When set or in emulation mode, both index registers are 8 bits wide.
It is not possible to control the width of the two index registers individually.
It can be affected by:
- REP (clears it if bit 4 of operand is set)
- SEP (sets it if bit 4 of operand is set)
- PLP (pops it off the stack)
- RTI
It affects the behavior of (possibly incomplete list):
In emulation mode, the x flag becomes the break flag.
There are no BXS or BXC instructions that examine this flag.
See Also
Reference
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.