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Y Index Register: Difference between revisions
From SnesLab
(→See Also: INY, DEY) |
(→Reference: 8.1.3) |
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On the [[S-SMP]] it is always 8 bits wide. On the [[65c816]], it may be 8 or 16 bits wide. | On the [[S-SMP]] it is always 8 bits wide. On the [[65c816]], it may be 8 or 16 bits wide. | ||
Unlike the [[X index register]], there are no instructions to transfer value of the [[stack pointer]] to/from Y. | |||
=== See Also === | === See Also === | ||
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* [[PHY]] | * [[PHY]] | ||
* [[PLY]] | * [[PLY]] | ||
* [[Accumulator]] | * [[Accumulator]] | ||
=== Reference === | |||
* 8.1.3 of [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] |
Latest revision as of 06:30, 20 December 2023
The Y Index Register exists on 65x processors and often holds the current index when iterating over things.
On the S-SMP it is always 8 bits wide. On the 65c816, it may be 8 or 16 bits wide.
Unlike the X index register, there are no instructions to transfer value of the stack pointer to/from Y.
See Also
Reference
- 8.1.3 of page 3-8-4 of Book I of the official Super Nintendo development manual