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Audio RAM: Difference between revisions

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There are two '''ARAM''' chips on the [[SNES Motherboard]], both connected to [[S-DSP]].  All accesses from the [[SPC700]] go through the S-DSP.
[[File:aram chip schematic.png|thumb|upper ARAM chip, straddling regions C4 and D4 of the [[jwdonal schematic]]]]


[[File:aram chip schematic.png|thumb|upper ARAM chip, straddling regions C4 and D4 of the jwdonal schematic]]
There are two '''ARAM''' chips on the [[SNES Motherboard]], both connected to [[S-DSP]]. All accesses from the [[SPC700]] go through the S-DSP.  ARAM is a total of 65,536 bytes (or 256 pages, or one [[bank]], or 512 [[kilobits]]) in size.  ARAM is timeshared between the S-SMP and S-DSP.
 
According to [[fullsnes]], ARAMs consisting of two Motorola MCM51L832F12 32Kx8 SRAM chips tend to contain a repeating 64-byte pattern of 32 zeros and then 32 FFh's at power up.
 
=== See Also ===
* [[WRAM]]
* [[VRAM]]
* [[ARAM Write Enable Flag]]
* [[Uppermost Page]]


=== References ===
=== References ===
* https://archive.org/details/SNESDevManual/book1/page/n99
# subparagraph 22.5.3 on [https://archive.org/details/SNESDevManual/book1/page/n99 Page 2-22-3 of Book I] of the official Super Nintendo development manual
# subparagraph 1.3.3 on [https://archive.org/details/SNESDevManual/book1/page/n153 page 3-1-2 of Book I], lbid.


[[Category:SNES Hardware]]
[[Category:SNES Hardware]]
[[Category:Integrated Circuits]]
[[Category:Integrated Circuits]]
[[Category:Audio]]
[[Category:Audio]]
[[Category:Address Spaces]]

Latest revision as of 00:53, 14 August 2024

upper ARAM chip, straddling regions C4 and D4 of the jwdonal schematic

There are two ARAM chips on the SNES Motherboard, both connected to S-DSP. All accesses from the SPC700 go through the S-DSP. ARAM is a total of 65,536 bytes (or 256 pages, or one bank, or 512 kilobits) in size. ARAM is timeshared between the S-SMP and S-DSP.

According to fullsnes, ARAMs consisting of two Motorola MCM51L832F12 32Kx8 SRAM chips tend to contain a repeating 64-byte pattern of 32 zeros and then 32 FFh's at power up.

See Also

References

  1. subparagraph 22.5.3 on Page 2-22-3 of Book I of the official Super Nintendo development manual
  2. subparagraph 1.3.3 on page 3-1-2 of Book I, lbid.