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LDX: Difference between revisions
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|A2 | |A2 | ||
|2 bytes | |2/3 bytes | ||
|2 cycles | |2 cycles* | ||
|+ | |+ | ||
| | |[[Absolute]] | ||
|AE | |AE | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing|Direct Page]] | ||
|A6 | |A6 | ||
|2 bytes | |2 bytes | ||
|3 cycles | |3 cycles* | ||
|+ | |+ | ||
| | |[[Absolute Indexed by Y]] | ||
|BE | |BE | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by Y]] | ||
|B6 | |B6 | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles* | ||
|} | |} | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags Affected | !colspan="9"|Flags Affected | ||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[M Flag|M]] | |||
|[[X Flag|X]] | |||
|[[Decimal Flag|D]] | |||
|[[I Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |+ | ||
|N | |N | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|. | |. | ||
|Z | |||
|. | |. | ||
|} | |} | ||
'''LDX''' (Load X) is a 65x instruction that loads the [[X index register]]. | '''LDX''' (Load X) is a 65x instruction that loads a value into the [[X index register]]. In [[immediate addressing]] only, LDX is a total of 3 bytes long when the index registers are 16 bits wide. | ||
==== Syntax ==== | |||
<pre> | |||
LDX #const | |||
LDX addr | |||
LDX dp | |||
LDX addr, Y | |||
LDX dp, Y | |||
</pre> | |||
==== Cycle Penalties ==== | |||
* In [[direct page addressing]] modes, LDX takes another extra cycle if the low byte of the [[direct page register]] is nonzero. | |||
* | |||
* | |||
=== See Also === | === See Also === | ||
* [[STX]] | |||
* [[LDA]] | * [[LDA]] | ||
* [[LDY]] | * [[LDY]] | ||
* [[TAX]] | |||
* [[TYX]] | |||
* [[TSX]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/463 page 463] on LDX | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n160 page 150] on LDX | ||
* [[MCS6500 Manual]] page on LDX | * 7.0 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n114 page 96] on LDX | ||
* [[Carr]] | * [https://archive.org/details/mos_microcomputers_programming_manual/page/n219 B-18], lbid. | ||
* [[Leventhal]] | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n277 page 264] on LDX | ||
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n121 page 3-72] on LDX | |||
* snes9x implementation of LDX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L772 | * snes9x implementation of LDX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L772 | ||
* undisbeliever on LDX: https://undisbeliever.net/snesdev/65816-opcodes.html#ldx-load-index-register-x-from-memory | * undisbeliever on LDX: https://undisbeliever.net/snesdev/65816-opcodes.html#ldx-load-index-register-x-from-memory | ||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#LDX | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Group Two Instructions]] | [[Category:Group Two Instructions]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
[[Category:Load/Store Instructions]] |
Latest revision as of 06:38, 22 August 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Immediate | A2 | 2/3 bytes | 2 cycles* | ||||
Absolute | AE | 3 bytes | 4 cycles* | ||||
Direct Page | A6 | 2 bytes | 3 cycles* | ||||
Absolute Indexed by Y | BE | 3 bytes | 4 cycles* | ||||
Direct Page Indexed by Y | B6 | 2 bytes | 4 cycles* |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
N | V | M | X | D | I | Z | C | |
N | . | . | . | . | . | Z | . |
LDX (Load X) is a 65x instruction that loads a value into the X index register. In immediate addressing only, LDX is a total of 3 bytes long when the index registers are 16 bits wide.
Syntax
LDX #const LDX addr LDX dp LDX addr, Y LDX dp, Y
Cycle Penalties
- In direct page addressing modes, LDX takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty, page 463 on LDX
- Labiak, page 150 on LDX
- 7.0 on MCS6500 Manual, page 96 on LDX
- B-18, lbid.
- Carr, page 264 on LDX
- Leventhal, page 3-72 on LDX
- snes9x implementation of LDX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L772
- undisbeliever on LDX: https://undisbeliever.net/snesdev/65816-opcodes.html#ldx-load-index-register-x-from-memory
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#LDX