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CPU Data Bus: Difference between revisions
From SnesLab
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Revision as of 17:27, 29 December 2023
The CPU Data Bus, (drawn in brown in the colorized jwdonal schematic), is the 8-bit data bus that moves data around during a DMA. It is denoted CD0~7 in Figure 2-22-1 "Super NES Functional Block Diagram." [1] It is connected to:
See Also
External Links
- page 2-22-2 of the official Super Nintendo development manual