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Index Register Select: Difference between revisions
From SnesLab
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It affects the behavior of (incomplete list): | It affects the behavior of (possibly incomplete list): | ||
* [[LDX]] | * [[LDX]] | ||
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* [[CPX]] | * [[CPX]] | ||
* [[CPY]] | * [[CPY]] | ||
* [[INX]] | |||
* [[INY]] | |||
* [[DEX]] | |||
* [[DEY]] | |||
* [[TXY]] | * [[TXY]] | ||
* [[TYX]] | * [[TYX]] |
Revision as of 17:22, 16 August 2024
Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:
- When clear, both index registers are 16 bits wide. It can only be clear in native mode.
- When set or in emulation mode, both index registers are 8 bits wide.
It is not possible to control the width of the two index registers individually.
It can be affected by:
It affects the behavior of (possibly incomplete list):
In emulation mode, the x flag becomes the break flag.
There are no BXS or BXC instructions that examine this flag.
See Also
Reference
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.