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Eyes & Lichty: Difference between revisions
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"'''Eyes & Lichty'''" is scene slang for the excellent manual "Programming the 65816 Including the 6502, 65C02, and 65802" by David Eyes & Ron Lichty. It may be the best unofficial textbook on SNES programming, due in no small part to the fact that the [[Ricoh 5A22]] is based on the 65c816 and the [[SPC700]] is based on the 6502. | "'''Eyes & Lichty'''" is scene slang for the excellent manual "Programming the 65816 Including the 6502, 65C02, and 65802" by David Eyes & Ron Lichty. It may be the best unofficial textbook on SNES programming, due in no small part to the fact that the [[Ricoh 5A22]] is based on the 65c816 and the [[SPC700]] is based on the 6502. | ||
=== Addressing Mode === | |||
Eyes & Lichty divides the 65c816's various addressing modes into two groups: simple and complex. Simple addressing modes are explained first and require the processor to do little effective address calculation. They are: | |||
==== Simple Addressing Modes ==== | |||
* [[Immediate]] | |||
* [[Absolute]] | |||
* [[Direct Page Addressing|Direct Page]] | |||
* [[Accumulator Addressing|Accumulator]] | |||
* [[Implied]] | |||
* [[Stack Addressing|Stack]] | |||
* [[Direct Page Indirect]] | |||
* [[Absolute Long]] | |||
* [[Direct Page Indirect Long]] | |||
* [[Block Move Addressing|Block Move]] | |||
see [https://archive.org/details/0893037893ProgrammingThe65816/page/108 page 108] | |||
==== Complex Addressing Modes ==== | |||
* [[Absolute Indexed by X]] | |||
* [[Absolute Indexed by Y]] | |||
* [[Direct Page Indexed by X]] | |||
* [[Direct Page Indexed by Y]] | |||
* [[Direct Page Indirect Indexed by Y]] | |||
* [[Direct Page Indexed Indirect by X]] | |||
* [[Absolute Indexed Indirect]] | |||
* Non-zero Direct Page | |||
* [[Absolute Long Indexed by X]] | |||
* [[Direct Page Indirect Long Indexed by Y]] | |||
* [[Stack Relative]] | |||
* [[Stack Relative Indirect Indexed by Y]] | |||
see [https://archive.org/details/0893037893ProgrammingThe65816/page/197 page 197] | |||
=== Eratta === | |||
Applicable to the 2015 edition: | |||
* On page 498, opcode F5 has a "0" superscript on the # of cycles column. | |||
* The [[stack]] diagram for [[RTI]] has the old [[status register]] value on the opposite side of the stack as the diagram for [[COP]] | |||
* [https://archive.org/details/0893037893ProgrammingThe65816/page/75 page 75] says the 65c816 has 25 different addressesing modes, but the datasheet says there are 24 | |||
* [https://archive.org/details/0893037893ProgrammingThe65816/page/94 Page 94] says the 65c816 has three push instructions that do not alter registers: [[PEA]], [[PEI]], and [[PER]]. But there are more than three, for example [[PHA]]. | |||
* [[PLB]] is not the only instruction that modifies the [[data bank register]]; [[MVP]] and [[MVN]] do too - see section 7.18 of the 65c816 datasheet | |||
* In the section on [[accumulator addressing]], a sentence implies that all read-modify-write instructions are unary, but [[TRB]] and [[TSB]] are not. | |||
* [https://archive.org/details/0893037893ProgrammingThe65816/page/497 page 497] recommends making sure the carry flag is already set, or to set it with [[SEC]] prior to doing a [[SBC]] to "avoid subtracting the carry flag" but it should say "to avoid subtracting one" | |||
* [https://archive.org/details/0893037893ProgrammingThe65816/page/510 Page 510] on [[TCD]] and page 512 on [[TDC]] mentions the [[direct page register]], but this is missing from the index | |||
* In the tables that show which MPU supports which instructions, an "X" denotes yes and a " " denotes no. Many readers would find a check mark less confusing. | |||
* The Rockwell 65c02 does not have a direct page, but the four Rockwell instructions are listed as having [[Direct Page Addressing]] anyway "for consistency." | |||
* The 65c02 datasheet does mention [[WAI]] and [[STP]] are supported (page 532 has them listed as unavailable) | |||
* The [[addressing mode]] for [[WDM]] is missing, but the datasheet says it is [[Implied]] | |||
* Assemblers are described as requiring the [[signature byte]] for [[COP]], but on the next page it says the signature byte is optional | |||
* The page on [[PLA]] has a typo that says the 65x pull instructions "set" the zero and negative flags; it should say "affect." | |||
=== Quick Links === | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n7 Table of Contents] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n13 Preface] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n15 Acknowledgments] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n17 Foreword] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n19 Introduction] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n21 How to Use this Book] | |||
====[https://archive.org/details/0893037893ProgrammingThe65816/page/n27 Part I Basics]==== | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n29 Basic Assembly Language Programming Concepts] | |||
====[https://archive.org/details/0893037893ProgrammingThe65816/page/n49 Part II Architecture]==== | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n51 Architecture of the 6502] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n71 Architecture of the 65C02] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n75 Sixteen-Bit Architecture: The 65816 and the 65802] | |||
====[https://archive.org/details/0893037893ProgrammingThe65816/page/n99 Part III Tutorial]==== | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n101 SEP, REP, and Other Details] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n109 First Examples: Moving Data] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n133 The Simple Addressing Modes] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n165 The Flow of Control] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n181 Built-In Arithmetic Functions] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n205 Logic and Bit Manipulation Operations] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n223 The Complex Addressing Modes] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n251 The Basic Building Block: The Subroutine] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n275 Interrupts and System Control Instructions] | |||
====[https://archive.org/details/0893037893ProgrammingThe65816/page/n291 Part IV Applications]==== | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n293 Selected Code Samples] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n325 DEBUG16 - A 65816 Programming Tool] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n387 Design and Debugging] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n397 Reference] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n399 The Addressing Modes] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n447 The Instruction Sets] | |||
<div style="column-count:10"> | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n449 ADC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n451 AND] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n453 ASL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n454 BCC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n455 BCS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n456 BEQ] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n457 BIT] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n458 BMI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n459 BNE] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n460 BPL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n461 BRA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n462 BRK] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n463 BRL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n465 BVC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n466 BVS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n467 CLC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n468 CLD] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n469 CLI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n470 CLV] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n471 CMP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n473 COP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n475 CPX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n476 CPY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n477 DEC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n478 DEX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n479 DEY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n480 EOR] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n482 INC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n483 INX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n484 INY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n485 JMP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n486 JSL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n487 JSR] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n488 LDA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n489 LDX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n490 LDY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n491 LSR] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n492 MVN] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n493 MVP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n497 ORA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n499 PEA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n500 PEI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n501 PER] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n502 PHA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n503 PHB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n504 PHD] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n505 PHK] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n506 PHP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n507 PHX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n508 PHY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n509 PLA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n510 PLB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n511 PLD] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n512 PLP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n513 PLX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n514 PLY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n515 REP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n516 ROL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n517 ROR] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n518 RTI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n520 RTL] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n522 RTS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n523 SBC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n525 SEC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n526 SED] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n527 SEI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n528 SEP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n529 STA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n530 STP] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n531 STX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n532 STY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n533 STZ] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n534 TAX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n535 TAY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n536 TCD] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n537 TCS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n538 TDC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n539 TRB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n540 TSB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n541 TSC] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n542 TSX] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n543 TXA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n544 TXS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n545 TXY] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n546 TYA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n547 TYA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n548 WAI] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n549 WDM] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n550 XBA] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n551 XCE] | |||
</div> | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n553 Instruction Lists] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n567 Appendices] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n569 65x Signal Description] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n577 65x Series Support Chips] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n587 The Rockwell 65C02] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n588 BBR] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n589 BBS] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n590 RMB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n591 SMB] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n593 Instruction Groups] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n594 Group I Instructions] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n595 Group II Instructions] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n599 W65C816 Data Sheet] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n621 The ASCII Character Set] | |||
*[https://archive.org/details/0893037893ProgrammingThe65816/page/n625 Index] | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Books]] | [[Category:Books]] | ||
[[Category:Scene Slang]] |
Latest revision as of 17:15, 22 October 2024
"Eyes & Lichty" is scene slang for the excellent manual "Programming the 65816 Including the 6502, 65C02, and 65802" by David Eyes & Ron Lichty. It may be the best unofficial textbook on SNES programming, due in no small part to the fact that the Ricoh 5A22 is based on the 65c816 and the SPC700 is based on the 6502.
Addressing Mode
Eyes & Lichty divides the 65c816's various addressing modes into two groups: simple and complex. Simple addressing modes are explained first and require the processor to do little effective address calculation. They are:
Simple Addressing Modes
- Immediate
- Absolute
- Direct Page
- Accumulator
- Implied
- Stack
- Direct Page Indirect
- Absolute Long
- Direct Page Indirect Long
- Block Move
see page 108
Complex Addressing Modes
- Absolute Indexed by X
- Absolute Indexed by Y
- Direct Page Indexed by X
- Direct Page Indexed by Y
- Direct Page Indirect Indexed by Y
- Direct Page Indexed Indirect by X
- Absolute Indexed Indirect
- Non-zero Direct Page
- Absolute Long Indexed by X
- Direct Page Indirect Long Indexed by Y
- Stack Relative
- Stack Relative Indirect Indexed by Y
see page 197
Eratta
Applicable to the 2015 edition:
- On page 498, opcode F5 has a "0" superscript on the # of cycles column.
- The stack diagram for RTI has the old status register value on the opposite side of the stack as the diagram for COP
- page 75 says the 65c816 has 25 different addressesing modes, but the datasheet says there are 24
- Page 94 says the 65c816 has three push instructions that do not alter registers: PEA, PEI, and PER. But there are more than three, for example PHA.
- PLB is not the only instruction that modifies the data bank register; MVP and MVN do too - see section 7.18 of the 65c816 datasheet
- In the section on accumulator addressing, a sentence implies that all read-modify-write instructions are unary, but TRB and TSB are not.
- page 497 recommends making sure the carry flag is already set, or to set it with SEC prior to doing a SBC to "avoid subtracting the carry flag" but it should say "to avoid subtracting one"
- Page 510 on TCD and page 512 on TDC mentions the direct page register, but this is missing from the index
- In the tables that show which MPU supports which instructions, an "X" denotes yes and a " " denotes no. Many readers would find a check mark less confusing.
- The Rockwell 65c02 does not have a direct page, but the four Rockwell instructions are listed as having Direct Page Addressing anyway "for consistency."
- The 65c02 datasheet does mention WAI and STP are supported (page 532 has them listed as unavailable)
- The addressing mode for WDM is missing, but the datasheet says it is Implied
- Assemblers are described as requiring the signature byte for COP, but on the next page it says the signature byte is optional
- The page on PLA has a typo that says the 65x pull instructions "set" the zero and negative flags; it should say "affect."
Quick Links
Part I Basics
Part II Architecture
- Architecture of the 6502
- Architecture of the 65C02
- Sixteen-Bit Architecture: The 65816 and the 65802
Part III Tutorial
- SEP, REP, and Other Details
- First Examples: Moving Data
- The Simple Addressing Modes
- The Flow of Control
- Built-In Arithmetic Functions
- Logic and Bit Manipulation Operations
- The Complex Addressing Modes
- The Basic Building Block: The Subroutine
- Interrupts and System Control Instructions
Part IV Applications
- Selected Code Samples
- DEBUG16 - A 65816 Programming Tool
- Design and Debugging
- Reference
- The Addressing Modes
- The Instruction Sets
- ADC
- AND
- ASL
- BCC
- BCS
- BEQ
- BIT
- BMI
- BNE
- BPL
- BRA
- BRK
- BRL
- BVC
- BVS
- CLC
- CLD
- CLI
- CLV
- CMP
- COP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- JMP
- JSL
- JSR
- LDA
- LDX
- LDY
- LSR
- MVN
- MVP
- ORA
- PEA
- PEI
- PER
- PHA
- PHB
- PHD
- PHK
- PHP
- PHX
- PHY
- PLA
- PLB
- PLD
- PLP
- PLX
- PLY
- REP
- ROL
- ROR
- RTI
- RTL
- RTS
- SBC
- SEC
- SED
- SEI
- SEP
- STA
- STP
- STX
- STY
- STZ
- TAX
- TAY
- TCD
- TCS
- TDC
- TRB
- TSB
- TSC
- TSX
- TXA
- TXS
- TXY
- TYA
- TYA
- WAI
- WDM
- XBA
- XCE