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Processor Status Register: Difference between revisions
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The only transfer instructions that do not modify these flags are [[TCS]] and [[TXS]]. | The only transfer instructions that do not modify these flags are [[TCS]] and [[TXS]]. | ||
These instructions do not modify any status flags: | |||
* [[BCC]] | |||
* [[BCS]] | |||
* [[BEQ]] | |||
* [[BMI]] | |||
* [[BNE]] | |||
* [[BPL]] | |||
* [[BRA]] | |||
* [[BRL]] | |||
* [[BVC]] | |||
* [[BVS]] | |||
* [[JMP]] | |||
* [[JSL]] | |||
* [[JSR]] | |||
* [[MVN]] | |||
* [[MVP]] | |||
* [[NOP]] | |||
* [[PEA]] | |||
* [[PEI]] | |||
* [[PER]] | |||
* [[PHA]] | |||
* [[PHB]] | |||
* [[PHD]] | |||
* [[PHK]] | |||
* [[PHP]] | |||
* [[PHX]] | |||
* [[PHY]] | |||
* [[RTL]] | |||
* [[RTS]] | |||
* [[STA]] | |||
* [[STP]] | |||
* [[STX]] | |||
* [[STY]] | |||
* [[STZ]] | |||
* [[TCS]] | |||
* [[TXS]] | |||
* [[WAI]] | |||
* [[WDM]] | |||
=== See Also === | === See Also === | ||
Revision as of 04:26, 23 July 2024
The Processor Status Register (P) is on the 65c816 and contains several flags:
- Negative Flag - N
- Overflow Flag - V
- Memory/Accumulator Select - M
- Index Register Select - X
- Decimal Mode - D
- Interrupt Disable Flag - I
- Zero Flag - Z
- Carry Flag - C
It can be pulled from the stack via PLP and RTI.
There are nine instructions that directly modify these flags, including:[3]
The only transfer instructions that do not modify these flags are TCS and TXS.
These instructions do not modify any status flags:
- BCC
- BCS
- BEQ
- BMI
- BNE
- BPL
- BRA
- BRL
- BVC
- BVS
- JMP
- JSL
- JSR
- MVN
- MVP
- NOP
- PEA
- PEI
- PER
- PHA
- PHB
- PHD
- PHK
- PHP
- PHX
- PHY
- RTL
- RTS
- STA
- STP
- STX
- STY
- STZ
- TCS
- TXS
- WAI
- WDM
See Also
References
- Table 18.2 Eyes & Lichty, page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/422
- Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/377
- page 262, https://archive.org/details/0893037893ProgrammingThe65816/page/262