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Negative Flag: Difference between revisions

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The '''Negative Flag''' (N) exists on the [[65c816]] as bit 7 of the [[status register]].  Although there are no dedicated SEN or CLN instructions to set or clear it, it can be set with [[SEP]] and cleared with [[REP]]:
The '''Negative Flag''' (N) is bit 7 of the [[65c816]]'s [[status register]].  Although there are no dedicated SEN or CLN instructions to set or clear it, it can be set with [[SEP]] and cleared with [[REP]]:


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Revision as of 06:10, 10 August 2024

The Negative Flag (N) is bit 7 of the 65c816's status register. Although there are no dedicated SEN or CLN instructions to set or clear it, it can be set with SEP and cleared with REP:

SEP #$80
REP #$80

These instructions also affect the negative flag (this bulleted list being 37 long):

Also, LSR always clears the negative flag because it also shifts a zero into the operand's most significant bit, making it non-negative.

BPL and BMI examine the negative flag to decide whether or not to branch.

See Also

Reference