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Negative Flag: Difference between revisions
From SnesLab
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[[BPL]] and [[BMI]] examine the negative flag to decide whether or not to branch. | [[BPL]] and [[BMI]] examine the negative flag to decide whether or not to branch. | ||
The negative flag is invalid in [[decimal mode]]. | The negative flag is invalid in [[decimal mode]] on the 6502. | ||
=== See Also === | === See Also === | ||
Revision as of 00:10, 20 September 2024
The Negative Flag (N) is bit 7 of the 65c816's status register. It is set or cleared to reflect the most significant bit of arithmetic/logical results or pulled/loaded/transferred values. Although there are no dedicated SEN or CLN instructions to set or clear it, it can be set with SEP and cleared with REP:
SEP #$80 REP #$80
These instructions also affect the negative flag (this bulleted list being 38 long):
- ADC
- AND
- ASL
- BIT
- CMP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- LDA
- LDX
- LDY
- ORA
- PLA
- PLB
- PLD
- PLP (missing from the Labiak textbook's list)
- PLX
- PLY
- ROL
- ROR
- SBC
- TAX
- TAY
- TCD
- TDC
- TSC
- TSX
- TXA
- TXY
- TYA
- TYX
- XBA
Also, LSR always clears the negative flag because it also shifts a zero into the operand's most significant bit, making it non-negative. Push instructions do not affect the negative flag.
BPL and BMI examine the negative flag to decide whether or not to branch.
The negative flag is invalid in decimal mode on the 6502.
See Also
References
- Labiak, Willam. Page 109
- Eyes & Lichty, "Branching Based on the Negative Flag" on page 148