We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
Zero Flag: Difference between revisions
From SnesLab
(bit 1) |
(→Reference: linkify Labiak) |
||
| Line 46: | Line 46: | ||
=== Reference === | === Reference === | ||
* Labiak, page 108 https://archive.org/details/Programming_the_65816/page/n118 | * [[Labiak]], page 108 https://archive.org/details/Programming_the_65816/page/n118 | ||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Flags]] | [[Category:Flags]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
Revision as of 07:31, 14 July 2024
The Zero Flag (Z) exists on the 65c816. It is bit 1 of the status register. It is affected by these 41 instructions:
- ADC
- AND
- ASL
- BIT
- CMP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- LDA
- LDX
- LDY
- LSR
- ORA
- PLA
- PLB
- PLD
- PLX
- PLY
- ROL
- ROR
- SBC
- TAX
- TAY
- TCD
- TCS
- TDC
- TRB
- TSB
- TSC
- TSX
- TXA
- TXY
- TYA
- TYX
- XBA
The SPC700 and Super FX chips also have a zero flag.