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Zero Flag: Difference between revisions
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The '''Zero Flag''' (Z) exists on the [[65c816]] | The '''Zero Flag''' (Z) exists on the [[65c816]] as bit 1 of the [[status register]]. It is affected by these 41 instructions: | ||
* [[ADC]] | * [[ADC]] | ||
Revision as of 11:39, 17 July 2024
The Zero Flag (Z) exists on the 65c816 as bit 1 of the status register. It is affected by these 41 instructions:
- ADC
- AND
- ASL
- BIT
- CMP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- LDA
- LDX
- LDY
- LSR
- ORA
- PLA
- PLB
- PLD
- PLX
- PLY
- ROL
- ROR
- SBC
- TAX
- TAY
- TCD
- TCS
- TDC
- TRB
- TSB
- TSC
- TSX
- TXA
- TXY
- TYA
- TYX
- XBA
The SPC700 and Super FX chips also have a zero flag.