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Negative Flag: Difference between revisions
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These instructions also affect the negative flag (this bulleted list being 37 long): | It is set or cleared to reflect the most significant bit of arithmetic results or transferred values. These instructions also affect the negative flag (this bulleted list being 37 long): | ||
* [[ADC]] | * [[ADC]] | ||
Revision as of 20:39, 12 August 2024
The Negative Flag (N) is bit 7 of the 65c816's status register. Although there are no dedicated SEN or CLN instructions to set or clear it, it can be set with SEP and cleared with REP:
SEP #$80 REP #$80
It is set or cleared to reflect the most significant bit of arithmetic results or transferred values. These instructions also affect the negative flag (this bulleted list being 37 long):
- ADC
- AND
- ASL
- BIT
- CMP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- LDA
- LDX
- LDY
- ORA
- PLA
- PLB
- PLD
- PLX
- PLY
- ROL
- ROR
- SBC
- TAX
- TAY
- TCD
- TDC
- TSC
- TSX
- TXA
- TXY
- TYA
- TYX
- XBA
Also, LSR always clears the negative flag because it also shifts a zero into the operand's most significant bit, making it non-negative.
BPL and BMI examine the negative flag to decide whether or not to branch.
See Also
Reference
- Labiak, Willam. Page 109